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Next Previous Silicon Protection Circuits TVS Rail Clamp Array in a Surface Mount Package SP0502AAH, SP0506AAA, SP0506AAB, SP0518AAA This family of rail clamp or "diode steering" arrays is designed for very low capacitance ESD protection and is offered in small surface mount packages. The multi-channel devices are used to help protect high speed sensitive digital or analog input circuits on data, signal, or control lines with unipolar voltage levels up to 5 VDC. The state-of-the-art structure is designed to suppress ESD and other transient over-voltage events to meet the International Electrotechnical Compatibility (IEC) transient immunity standards IEC 61000-4-2 for Electrostatic Discharge Requirements. The monolithic silicon devices are comprised of specially designed low capacitance structures for transient voltage suppression (TVS). The size and shape of these structures have be tailored for transient protection. The low capacitance and clamp voltage are ideal for high speed signal line protection. NEW Ordering Information Part Number SP0502AAHT SP0506AAAT SP0506AABT SP0518AAAT Features Quantity Per Reel 3000 4000 2500 2500 * A low capacitance 2, 6 and 18 channel array of rail clamp current steering diodes in small surface mount packages * ESD Protection Capability (SP0502 and SP0506) - IEC 61000-4-2, Direct Discharge . . . . . . . . . . . . . . . . . . 8kV (Level 4) - MIL STD 3015.7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15kV * ESD Protection Capability (SP0518) - IEC 61000-4-2, Direct Discharge . . . . . . . . . . . . . . . . . 15kV (Level 4) - MIL STD 3015.7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15kV * Input Protection for Applications Up to 5VDC * Fast Response Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .< 1ns * Low Input Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-7pF Typical * Low Clamp Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Vrail + 13V Max * Low Input Leakage. . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . .100nA typ * Operating Temperature Range. . . . . . . . . . . . . . . . . . . . . - 20C to +85C CH 2 6 6 18 Package Type SOT143 MSOP8 SOIC8 QSOP24 5 SILICON PROTECTION CIRCUITS Schematic SP0502AAHT 4 V+ SP0506AAAT and SP0506AABT 8 CH 6 7V 6 + CH 5 5 CH 4 CH 1 2 3 CH 2 V1 Applications 1 CH 1 2 CH 2 V- 3 4 CH 3 * * * * Cell phone hand sets Personal Digital Assistants (PDA) Portable handheld equipment (Laptop, Palmtop computers) Computer port, keyboard (USB1.1) SP0518AAAT V+ CH18 CH17 CH16 CH15 CH14 V24 23 22 21 20 19 18 CH13 CH12 CH11 CH10 V+ 17 16 15 14 13 1 2 3 4 5 6 7 V+ CH1 CH2 CH3 CH4 CH5 V- 8 9 10 11 12 CH6 CH7 CH8 CH9 V+ w w w. l i t t e l f u s e . c o m 205 Next Previous Silicon Protection Circuits TVS Rail Clamp Array in a Surface Mount Package SP0502AAH, SP0506AAA, SP0506AAB, SP0518AAA Electrical Specifications TA = 25C Unless Otherwise Specified PARAMETER Operating Supply Voltage Supply Current Channel Leakage Current Signal Clamp Voltage Positive Negative Diode Forward Voltage Maximum Forward current SP0502 and SP0506x SP0518 VN - 0.5 20 40 mA mA 0.65 15kV ESD HBM VP + 13 VN - 13 0.95 V V V TEST CONDITIONS Vp - Vn Vp - Vn = 5.5V MIN - TYPICAL 0.1 MAX 5.5 10 0.1 UNITS V A A Maximum DC Input voltage VP + 0.5 V ESD Test Level (SP0502 and SP0506x) IEC-61000-4-2, Contact discharge MIL-STD-883 Method 3015 (HBM) ESD Test Level (SP0518) IEC-61000-4-2, Contact discharge MIL-STD-883 Method 3015 (HBM) Capacitance SP0502 and SP0506x SP0518 Turn on/off Time Temperature Range Operating Storage - 20 - 65 +85 +150 C C 2.5VDC @ 1Mhz 2.5VDC @ 1Mhz 3 7 <1 6 12 pF pF ns 15 15 kV kV 8 15 kV kV Typical Capacitance SP0502 and SP0506x 6 12 10 4 8 SP0518 CIN (pF) CIN (pF) 2 0 0 1 2 VIN Typical Variation of CIN with VIN 3 4 5 6 4 2 0 0 1 2 VIN Typical Variation of CIN with VIN 3 4 5 (VP=5V, VN=0V, 0.1F chip capacitor between VP & VN) 206 (VP=5V, VN=0V, 0.1F chip capacitor between VP & VN) w w w. l i t t e l f u s e . c o m Next Previous Silicon Protection Circuits TVS Rail Clamp Array in a Surface Mount Package SP0502AAH, SP0506AAA, SP0506AAB, SP0518AAA Outline Drawings Recommended Pad Layout min E F X2 Package mm SOT143 inches max 3.04 1.40 2.64 .020REF 1.920REF 1.120 0.100 0.940 0.510 0.180 60 1.40 1.90 1.70 1.00 1.20 1.40 min .110 .047 .083 .035 .0005 .030 .015 .0033 .134 .032 .040 max .120 .055 .104 1.920REF .076 .044 .0040 .037 .020 .0071 .140 .055 .075 .067 .040 .048 .055 E E1 2.80 1.20 2.10 0.890 0.013 0.760 0.370 0.0850 40 0.80 1.00 - 4 E1 3 E2 Z G F1 E2 G G1 502A 1 G G1 2 A X1 X A1 B B2 C A Z G A1 B B2 C 5 SILICON PROTECTION CIRCUITS F F1 X X1 X2 SP0502AAH - SOT143 Outline Drawings Recommended Pad Layout F F1 Package mm min E E1 2.90 2.90 4.78 0.87 0.05 0.52 - MSOP 8 inches max 3.10 3.10 4.98 1.17 0.25 0.30 0.65 0.18 0.54 0.65 0.38 5.28 1.04 4.24 min .114 .114 .188 .034 .002 .017 max .122 .122 .196 .046 .010 .012TYP .25TYP .007TYP .025 .0256 .015 .208 .041 .167 E Z G E2 A A1 B B2 C C1 F E2 F L 506 A X E1 A C C1 B B2 F1 Z A1 X G SP0506AAA - MSOP 8 w w w. l i t t e l f u s e . c o m 207 Next Previous Silicon Protection Circuits TVS Rail Clamp Array in a Surface Mount Package SP0502AAH, SP0506AAA, SP0506AAB, SP0518AAA Outline Drawings Recommended Pad Layout F F1 Package mm min E 4.80 3.80 5.80 1.35 0.10 0.33 0.19 0.40 0.60 7.20 - SOIC 8 inches max 5.00 4.19 6.20 1.75 0.25 0.51 1.27 0.25 1.27 1.27 0.80 7.40 2.40 3.81REF 5.00REF min .189 .150 .228 .053 .004 .013 .007 .016 .02 max .197 .165 .244 .069 .010 .020 .050 .010 .050 .05 .03 .29 .09 .15REF .19REF E F L E2 E1 Z G E2 A A1 B SP0506 AAB E1 X X1 B2 C C1 A C C1 B B2 F A1 F1 Z X X1 G SP0506AAB - SOIC 8 Package mm E E2 QSOP 24 inches max 8.73 3.98 6.19 1.75 0.25 min .337 .150 .228 .053 .004 max .344 .157 .244 .069 .010 min E E1 E2 8.56 3.81 5.79 1.35 0.10 E1 LF SP0518 AAA A A1 B B1 C C1 0.20TYP 0.30TYP .008TYP .012TYP 0.18 0.40 0.64TYP 0.25 1.27 .007 .016 .025TYP .010 .050 A C A1 B C1 B2 SP0518AAA - QSOP 24 208 w w w. l i t t e l f u s e . c o m |
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